George Cozma | Editor in Chief of Chips and Cheese All opinions are my own

Joined June 2021
All this does is make me even more excited for Supercomputing 2026!
wowsers this feels like a lifetime ago;;
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And I ask again, what does the ISA have to do with power consumption? The answer is it doesn't... SoC design is what impacts power consumption...
Finally! Looks like CES will be interesting. AMD has been quite behind for a while and also have the worst battery life in laptops. Time to change that.
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Wut? Ok, let's say that AMD "only" sells 8 million accelerators between 2026 and 2030... if they are some how only making... let's utterly lowball this and say 10K worth of profit on each accelerator... that is still 80 billion dollars of profit in 4 years... This makes no sense
I’ve been saying for awhile now that it’s not a certainty that AMD gets to continue their accelerator program long term Many AMD proponents will say that AMD will sell all the silicon they can produce, but that’s a false qualification All useable silicon will be bought ≠ AMD will have the right to build their accelerator program long term AMD is in a very precarious position. Stuck between the insatiable demand for NVIDIA hardware, and the insatiable demand for custom ASICs. I don’t think its an exaggeration to say that Google, Meta, and Amazon would all strongly prefer more wafer allocation to their own custom silicon programs rather than wafers go to AMD Ultimately if there isn’t sufficient ‘true’ demand for AMD accelerators, then the program will fall further behind until it no longer makes economic sense to pursue it
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I don't get why the 2 lines are blurred out... The slightly darker highlighted runs are just the same system and CPU which is checked via CPUID... Like this is just several 9950X3D2 runs...
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At the @AMD booth, they had multiple versions of the new @OpenComputePrj OAC (Open Accelerator Card) with both air and liquid cooled versions which are aiming to replace the older PCIe CEM standard in the datacenter with support for up to 5000W per double wide liquid cooled OAC.
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So... @RaptorCompSys and @Solid_Silicon still has not given any updates on their planned POWER9 replacement 3 years after promising a replacement... Will there be a replacement for POWER9? Is Solid Silicon still working on a general purpose CPU? Many questions, no answers...
So... it has been over 2 years since this announcement and we have had radio silence from both @RaptorCompSys and @SolidSilicon as to what the status of this is and Solid Silicon has removed the S1 CPU from their website earlier this year...
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At the @intel booth, they were demoing Crescent Island running both LLMs and Video Generation along with the new Open Accelerator Card form factor.
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I like fat caps and I can not lie!
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Here are some more panels, but I couldn't tell what SoCs these panels belong too?
Oooo, saw some ASE Panels on the OCP showfloor! Looks like they are the panels that Venice will be using.
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Oooo, saw some ASE Panels on the OCP showfloor! Looks like they are the panels that Venice will be using.
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So... I just saw the verdict in @Qualcomm vs. @Arm and the TLDR is that Qualcomm won on the ALA and business interference arguments with Arm prevailing on the TLA arguments... Here is the link to the full Jury verdict on CourtListener (storage.courtlistener.com/re…)
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I spy with my little eye some LPXs...
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Diamond Rapids Motherboard spotted at @OpenComputePrj
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Here @OpenComputePrj 2026, @AMD's Lisa Su showed off their upcoming Verano CPU which pairs Zen 6 CCDs with what looks like 4 memory controller dies that support LPDDR5X on the top and bottom of the IO dies.
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Oh god... this looks, and reads, like awful Claude/Deepseek slop... It's like they asked the LLM to make them an ISA with every idea under the sun in it without regard of if it is a good idea or not... It's utterly incoherent and a complete mess... unlikely to see HW...
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Cheese retweeted
Sadly, I have lost the chain of custody of this meme as it passed through someone in my discord. But, it checks out. support.arm.com/documentatio…
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I just found out that the Academy of Natural Sciences is going to close tomorrow with basically a months notice from @DrexelUniv... There was no attempt to fundraise or find a different solution... just close it down... Shame on you Antonio Merlo and the Board of the ANS...
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If there's thermal crossover between 2 different servers in an "airgapped" system... there is very little air between those 2 systems AKA build a better airgapped system... This is not a difficult """problem""" to solve... You can think about sidechannels without BS scenerios...
OpenAI's Noam Brown says air-gapping the computers may not stop a misaligned AI, because two air-gapped machines can still talk by running a CPU hot and reading the temperature change "But I think the major takeaway from the incident is that people underestimated the AI. And we never want to be in a situation again where we underestimate the AI. It's a weird world, because AI progress is so fast that people are consistently underestimating the AI." "So to be in a situation where you don't underestimate it again, when it comes to safety and alignment, you have to have a very, very, very high bar." "You could even go as far as to say, "Well, we should air gap the computers." And I'm not convinced that that would be sufficient." "There are studies, and this is mostly academic, where you can have two computers next to each other that are air-gapped and they're still able to communicate with each other because they have temperature sensors." "One of them is able to run their CPU really hot, and then the other one can actually detect the temperature change, and then that actually gives them a mechanism to communicate." _________ Link and more key quotes from OpenAI's safety related conversations: firesidealpha.substack.com/p…
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Uhhh... Panther Lake can saturate the 153GB/s of memory bandwidth from both the CPU and GPU...
Replying to @mweinbach
This is sorta where you find something like the M-series base chips and Intel panther lake. Yes, it’s lower memory bandwidth but can you saturate it? Is it a bottleneck? Maybe on M5/M6 but I don’t think so for Intel. For DGX Spark memory bandwidth absolutely is a bottleneck. It’s not universally more=better if you can’t use what’s available.
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