Product and corp comms @ Intel | Ex- Amazon, AWS, nvidia, Cisco, SUN, and WiReD | Backyard and front porch enthusiast

Joined May 2008
👀
I spent two days touring Intel’s most advanced fab and talking to its technical leadership to understand what the chips of the future will look like. A lot of what's coming next – gate-all-around transistors, backside power, CFET, hybrid bonding – is hard to follow without actually seeing it, so we made all the awesome animated explainers that I wish I had while I was prepping. I also asked Intel’s leadership how the semiconductor industry will cope with the enormous shock in demand from AI. AI compute has grown 3x a year for the last decade, but according to Intel's CTO, Intel could only double leading-edge wafer production with today’s global stock of chipmaking tools. What kinds of tricks can foundries pull to extend this crossover point where demand surges way ahead of supply? This was a totally new format for us - hope you enjoy! 0:00:00 – Intro 0:00:47 – How Intel brings up a new process node 0:03:22 – What Intel learned from 10nm 0:06:28 – From planar transistors to gate-all-around 0:13:13 – Why High-NA EUV pays off for Intel but not TSMC 0:19:20 – Could chips have evolved completely differently? 0:23:33 – Inside Intel's "Hot Topics" meeting 0:29:30 – Replacing copper wires with ruthenium 0:32:41 – Why stacked transistors take a decade to ship 0:39:45 – Hybrid bonding and the chip-to-chip bottleneck 0:48:00 – There aren't enough tools to 10x chip production 0:53:14 – Can Intel catch up to TSMC? 1:01:02 – Terafab, and rethinking the fab from scratch
1
19
717
👀
Building semiconductor leadership requires both innovation and the manufacturing capacity to bring it to scale. In his latest piece, Naga Chandrasekaran highlights Intel Foundry’s growing U.S. footprint, including progress on our Ohio site. Read more: ms.spr.ly/6010avfyk #IntelFoundry
2
91
Jesse Freund retweeted
Meet Googlebook. A new laptop experience from @Google and @Android, engineered for anything. Learn more 👉 intel.com/content/www/us/en/…
47
132
26
1,061
79,492
Very cool place
3
215
Jesse Freund retweeted
Live from #SplunkConf26 Wide ranging conversation yesterday between @jpatel41 and @LipBuTan1 covering everything from transformation underway at @intel, to capitalizing on new markets, relevance of CPU, agents, security. Worth a listen!
2
8
3
46
23,796
Welcome!!!
Right here at @intel's Ocotillo campus, some of the most precise, high-stakes manufacturing on the planet is happening. Intel is building the chips that power our computers, our hospitals, and our national defense. Arizona has become the center of American semiconductor manufacturing, and that didn't happen by accident. It happened because we fought to bring this industry back to American soil.
1
155
Jesse Freund retweeted
Tonight @Intel_Foundry & @ASMLcompany announced real progress on High NA EUV. With over 1 million wafers processed to date and High NA in production today, our collaboration is delivering value now while laying the foundation for future scaling. tomshardware.com/tech-indust…
3
7
277
👀
Hundreds of billions are being invested in U.S. semiconductor manufacturing. But spending isn’t the same as capability. VP and Principal Analyst @MattKimball_MIS examines how much of the full AI chip lifecycle actually operates on U.S. soil today. 📌 Read the full insight: moorinsightsstrategy.com/bey…
2
176
👀 🐆💦 👀 ❤️❤️❤️❤️❤️
116
Jesse Freund retweeted
The future of AI depends on a strong foundation. At AI Infra Summit 2026, we're highlighting the latest solutions from Intel Core, Intel Xeon, and Intel AI designed to support AI workloads across edge, enterprise, cloud, and physical AI. Learn more: ms.spr.ly/6018auXAG
19
23
7
109
30,111
Jesse Freund retweeted
Now is the time to visit the Ballard Locks fish ladder: Thousands of Chinook salmon have passed through this August, including more than 2,500 counted during one five-day stretch. myballard.com/2026/08/25/tho…
3
26
1,606
AI-scale workloads are putting greater pressure on data center CPUs to deliver more performance within fixed power limits. That makes transistor architecture and power delivery key factors in determining how effectively process improvements translate into real processor performance. In partnership with @intel, @TheFuturumGroup examines how Intel’s 18A-P process combines RibbonFET transistors with PowerVia backside power delivery to improve operating frequency at low voltage. The brief explores the silicon-validated results behind these technologies and what they mean for Diamond Rapids, Intel’s next-generation Xeon platform. ⏯️ Explore the key findings, and use the link to download the full brief: 👉 bit.ly/4xjx4GC #Semiconductors #DataCenter #Intel #AIInfrastructure #Futurum
3
2
13
4,836
Jesse Freund retweeted
Get ready for an exclusive look behind the scenes of developing Intel Core Ultra Series 3 processors. The Making of Panther Lake documentary premieres August 26 at 12pm PT on Intel Tech YouTube. Join us for the watch party on the Intel Insiders Discord: ms.spr.ly/6018aOcQr
16
3
110
4,766
Jesse Freund retweeted
At #HotChips2026, Intel is showcasing three upcoming architectures spanning the rack to the edge, including two processors powered by Intel Foundry technologies such as Intel 18A, Intel 18A-P, Foveros Direct 3D packaging, and more. ms.spr.ly/6019aOePU #IntelFoundry
29
1
122
3,536
Jesse Freund retweeted
Worth re-sharing the blog post from June published around VLSI. Lots of good info on Intel 18A-P and other research! community.intel.com/t5/Blogs…
1
1
250
Jesse Freund retweeted
Hot Chips is going to be a CPU rock fight. $INTC Diamond Rapids has entered the chat in the white paper "Multi-turn Agents require Max Sustained Thread Performance at Rack Scale" ahead of its Hot Chips coming out party on Monday. A direct response to the Vera Max Single-Threaded thesis. AMD has a claim to the full agent loop as well but will be focusing on GPUs at HC. Intel argues that different CPU profiles should be routed within a single agent loop. That allows the volume of agents per rack to increase. This seems to point to the Rackscale Blueprints teased at Computex. Introducing alternative benchmarks like Agents Per Rack puts SPEC benchmarks aside for now. So the debate should be lively.
8
25
5
121
21,887
Got to take a tour of Feb 25 with the comms and marketing team @intel in Oregon this week. What an amazing experience. Hard to grok how awesome and differentiating @Intel_Foundry is without seeing it first hand.
8
5
1
91
4,297