Trapdoor-Tech (@trapdoor_tech) profile picture

Trapdoor-Tech tries to connect the world with ZKP technologies. ZKP proving acceleration are our first small step. https://teapaw.org/t.co/aha04mvTfu

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Joined November 2021
Photo by Trapdoor-Tech (@trapdoor_tech)Photo by Trapdoor-Tech (@trapdoor_tech)Photo by Trapdoor-Tech (@trapdoor_tech)Photo by Trapdoor-Tech (@trapdoor_tech)Photo by Trapdoor-Tech (@trapdoor_tech)
Deep into RISC0: medium.com/@trapdoortech/zer… RISC0 is a zkVM that supports program execution based on the RISC-V instruction set. The zkVM’s circuits are written using Zirgen. Zirgen leverages LLVM/MLIR to convert circuit constraints into multi-language implementations. @RiscZero
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Trapdoor-Tech retweeted
🏆 ZPrize 1B '23 wrapped up in October with the winners: 🔹 GPU Track 1️⃣ Snarkify @Snarkify_ZKP - 0.5s 2️⃣ Mike Voronov @VMS11 & Alex Kolganov @Alexander_K_S - 0.7s 3️⃣ Trapdoor Tech @trapdoor_tech - 3s 🔹 FPGA Track 1️⃣ Ponos @PonosTechnology - 200s
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Summary about SP1 zkVM source code: trapdoortech.medium.com/zero… SP1 zkVM, building upon Plonky3, introduces enhancements to the AIR interface for chip interconnections. It implements the LogUp algorithm to establish interconnections and memory access consistency. @SuccinctLabs
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ZKP proving performance is a pain. FPGA or GPU? It depends. However, if the cost/performance ratio is concerned, GPU is possibly a better choice for current ZKP projects. You can check our thoughts on the topic: trapdoortech.medium.com/zero…
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5/ Summarization. FPGAs is better for low latency and low power consumption. Considering the advantages of GPUs, e.g., high programmability and well developed framework for high performance computing, it's better for rapid iterative development and high throughput scenarios.
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4/ The supply of GPUs is sufficient and the delivery time could be promised.
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3/ The power consumption of FPGAs is less. Currently, the power consumption of Nvidia 3090/3090ti is about 300w. While for FPGAs, it's in general at the lower level of a few dozen watts.
2/ GPUs support high bandwidth and larger memory capacity, e.g., GDDR6X/HBM with more than 20G of memory. Most FPGAs support DDR4. Some high-end FPGAs support HBM, but only up to 16G of memory.
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For example, FPGA resources that implement MSM cannot be re-used to compute NTT. Midrange FPGAs of Virtex UltraScale+ have the bandwidth of PCIe 3.0 x16. Only few models of high-end FPGAs support PCIe 5.0.
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1/ GPUs support high performance parallel computing with powerful programmability, and higher bandwidth (PCIe 4.0 x16). But programmability of FPGAs is kind of weak compared to GPUs.
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Trapdoor Tech gets the 1st prize on zkHack mini puzzles :) The puzzles are fascinating and based on STARK protocol. ZK application developers should go through those puzzles thoroughly and learn a lot from those vulnerabilities, which look so real. Thanks a lot to zkHack :)
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Aleo uses four circuits to keep all transaction information confidential. PoSW circuit is used for consensus. With Nvidia RTX 3090, the PoSW circuit proving performance can be accelerated by more than four times. starli.medium.com/aleos-circ…
TrapdoorTech solved all six puzzles in last weeks and get the 5th on the leaderboard. Solving zero-knowledge puzzles are really cool to us :) Thanks to zkHack and puzzle creators to make the great zero-knowledge event happen.
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Good luck to get the NFT - Num 10. Zero Knowledge Podcast is really good place to learn zk technologies and applications.
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Glad to win the 2nd prize of Puzzle 3 :) zkhack.dev/puzzle3.html The ZK Hack is really fun. The puzzles are good and practical learning materials. Anyone who wants to know better or deep about zk technology should go through those puzzles one by one.
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