@wavedrom

Diagrams for Engineers https://xitter.cf/t.co/SWk8zcbNRW https://xitter.cf/t.co/rYrHOG8AOU https://xitter.cf/t.co/mqrR3ofoer

 CM97bf
wavedrom.com
Joined July 2011
  • Tweets7.1K
  • Following1.4K
  • Followers2.8K
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WaveDrom JSON Schema is now in @SchemaStore 🎉 Name files *.wavedrom.json / *.wavejson and get validation, autocomplete and hover docs in VS Code, JetBrains, Neovim & more. Updated schema + setup guide: github.com/wavedrom/schema How do you use it? Feedback welcome 👇

GitHub - wavedrom/schema: JSON schema for WaveDrom

JSON schema for WaveDrom. Contribute to wavedrom/schema development by creating an account on GitHub.

github.com
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What is the best format of "Design System" ground truth targeting LLM? MD file? HTML+CSS? JS? Design Tokens? How do I have conversation with LLM Agent about design rationale, ideas, principles, guidelines, visual language, aesthetics? Is /design-system/ page just for humans?
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WaveDrom retweeted
MOM
@mom_agency_Oct 5
This is why GPUs cost $6,000
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40 years of "Coding" buried engineering "drawing board" skills, collaboration practices, terminology, jargon. More important: spatial thinking, visual languages, diagrams, and approaches of previous era. Now, LLMs render raw Coding obsolete. Are we Back to the Drawing Board.
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6 superintelligent CEOs signed superintelligence renaming document renaming hole country! super!
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I think it AI spellchecker's revenge!
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Weekend project
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How often you ask gemini a simple question and it casually spills the master prompt at you?
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WaveDrom retweeted
Nickro
@Nickro666Aug 19
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MaxellCorp
@MaxellCorpAug 11
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Benathon@BenathonAug 9
thank you @S2SmeX for saying you liked me editing. I hope to impress you again with this funny story youtube.com/watch?v=Hy-_AGHu…

My Boss Used a Children’s Book to Run His Company

I've had some pretty terrible bosses over the years.Not just boss...

youtube.com
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WaveDrom retweeted
cnlohr
@cnlohrAug 7
In you, there are two social networks.
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Just built a thing: turn a $0.10 CH32V003 MCU into a tiny PLD. Write logic in Verilog, my toolchain (Verilator + @cnlohr's ch32fun) lowers it to bare-metal C that bit-bangs GPIO. Slower than a real gate (0.6µs delay) but reprogrammable & already in your drawer & you can solder it & and it is 5V 🧰 Oscilloscope says it works. Huge thanks to @cnlohr for ch32fun and Wilson Snyder for Verilator — without them this wouldn't exist. github.com/wavedrom/cherepan… #electronics #fpga #verilog #riscv #PLD

GitHub - wavedrom/cherepanov: MCU as PLD

MCU as PLD. Contribute to wavedrom/cherepanov development by creating an account on GitHub.

github.com
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Added BCD example for 7-segmented nerds. github.com/wavedrom/cherepan…

cherepanov/examples/74x47/ic_74x47.v at trunk · wavedrom/cherepanov

MCU as PLD. Contribute to wavedrom/cherepanov development by creating an account on GitHub.

github.com
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Replying to @wavedrom @cnlohr
Most of the simulation loops are getting the same input. I have added early check for changes, that improved polling rate and reduced jitter. 2-20 times depending on the logic itself.
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