We design and build easy-to-use FPGA modules with USB interfaces and our FrontPanel SDK.

Portland, OR
Joined October 2010
Opal Kelly Inc. retweeted
SYZYGY peripherals and @opalkelly's XEM7320 are the perfect match for high-performance instrumentation development like data acquisition, cameras, and SDR: opalkelly.com/products/xem73…
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Opal Kelly Inc. retweeted
Thanks @opalkelly for the slick hardware. 😍 Now I can validate SYZYGY pods on official hardware. This should also help with some design choices on my newest ButterStick design. 🥳
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Opal Kelly Inc. retweeted
Spun up a quick SYZYGY design for a CAN adapter: github.com/gregdavill/syzygy… You may be able to implement the CAN controller in gateware and get by with just a transceiver on the hardware side, but I still don't know how CAN works. 😆
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Opal Kelly Inc. retweeted
. @DigilentInc makes it official. Check out their latest blog post here: blog.digilentinc.com/embraci…
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Opal Kelly Inc. retweeted
We did a simple project which will help you to explore the @opalkelly XEM7310 capabilities for transferring large amounts of data using #USB3. Check out our easy step-by-step tutorial here: wizzdev.pl/blog/
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Opal Kelly Inc. retweeted
New SYZYGY Specification v1.1 and updated DNA Specification as well. Introducing a 4-lane transceiver port type (TXR-4). Please visit our blog for more details. opalkelly.com/syzygy-specifi…
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Opal Kelly Inc. retweeted
The SZG-SENSOR and SZG-DAC-AD9116 modules are back in stock on the Opal Kelly store. opalkelly.com/products/#tab-…
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Opal Kelly Inc. retweeted
This is on the bench this week... Half dozen SYZYGY ports on a breakout / eval board for an upcoming #FPGA integration module.
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We've just started the alpha preview of our new Aligni Connector for @Altium Designer. Currently supporting AD17 and AD18. Unified #PLM, #MRP, and schematic workflow couldn't be easier! Learn more here: aligni.com/doc/tools/aligni-…
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Opal Kelly Inc. retweeted
What did you do on your summer vacation? An #FPGA intern shows us his signal generator wp.me/pk3lN-1lcJ
Opal Kelly Inc. retweeted
We've posted the final version 1.0 of the SYZYGY DNA Specification on our website. syzygyfpga.io/specification/ Please have a look. The most notable change from the PROVISIONAL version posted previously is a 16-bit CRC in the header. Software updates to follow soon!
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Opal Kelly Inc. retweeted
New board with FPGA and @risc_v ASIC shielddigitaldesign.com/fris… Nice to see that the @SYZYGYfpga interface is gaining traction. It hits a sweet spot between PMOD and FMC where I can see plenty of applications
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Opal Kelly Inc. retweeted
Get a closer look at #SYZYGY -- the schematics and BOM for Brain-1 and several peripherals are now available. Check it out: crowdsupply.com/opal-kelly/s… @SYZYGYfpga
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Opal Kelly Inc. retweeted
Jake talks with Amelia Dalton @EEJournalTFM about the @opalkelly Brain-1 that recently funded through @crowd_supply. eejournal.com/fish_fry/if-i-…
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Opal Kelly Inc. retweeted
I didn't think I could fall in love with PCB routing again, but here we are. @altium's improved curve-route works w/diff pair, multi-routes!
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Trends and highlights from Embedded World 2017 ubm.io/2mDP2R7 @eetimes @embedded_com
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Space and security are keynote topics at ESC Boston 2017 ubm.io/2oauLWh @eetimes @embedded_com @ESC_Conf #ESCBOS
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Opal Kelly Inc. retweeted
Lessons learned from FPGA development in space adiuvoengineering.com/USING%…
Opal Kelly Inc. retweeted
AWS makes Amazon EC2 F1 instance hardware acceleration based on Virtex UltraScale+ FPGAs generally available lnkd.in/gDPFvMK